Recent Tapeout!
Congratulations to SSCS officer Evan Haas for the recent tapeout of a wearable transcutaneous oxygen monitoring chip! Through the Integrated Circuits and Systems (ICAS) lab lead by Professor Guler, Evan lead the layout design alongside analog and digital designers Burak Kahraman (PhD) and Vladimir Vakhter (PhD). But what is tapeout?
Tapeout is the final stage of the integrated circuit (IC) design cycle, where the completed layout is sent to a semiconductor foundry for fabrication. The layout consists of the physical metal, polysilicon, and diffusion that makes up components like transistors, resistors and capacitors. Much to my dismay, the analog schematics you draw in class cannot be submitted to foundries like TSMC for fabrication, but must first be sized and placed manually as seen on the left part of the chip above.
Fun fact: The term "tapeout" is from when paper tape and later magnetic tape reels were loaded with the final electronic files used to create the photomask at the factory. Now, it is much easier to send the files over the internet... :)
Anyways, tapeout marks the final transition from design to manufacturing, ensuring all verification checks are passed, effectively "signing off" on the chip's design. Every nanometer of geometry in the layout is analyzed by the electronic design automation (EDA) tool to ensure that it pertains to the fabrication rules determined by the foundry. The layout must also match the schematic! My favorite EDA tool provider Cadence has made a general flow displaying this process.
General IC design-to-tapeout flow.
I hope this gives a glimpse into what tapeout is and its importance in the stage of a integrated circuit's development. The final step is receiving the real piece of silicon, and praying with all your being that it works.
If you want to learn more about the chip, you can email me or find me on the second floor of Atwater Kent. I love to talk and learn about circuits!
Evan Haas
edhaas@wpi.edu